The disclosed invention relates generally to the field of circuit board testing and more specifically to the art of compressing sequences of circuit board data-vectors. Generally, a given circuit board consists of numerous semiconductor chips, such as a microprocessor, memory chips, counter chips, control chips, etc., laid out according to some interactive design. Following design and layout of the circuit board, it is necessary to test the board to ensure that all the chips, as laid out, perform as expected. Testing will involve application of data-vectors to pins of a given chip (or cluster of chips) on the board. A data-vector for a given chip (or cluster of chips) generally consists of a binary word having an "input" portion and an "output" portion. The goal in testing is to determine if the application of the input portion of a data-vector produces an output matching the output portion of the data-vector. If there is a match, the test is successful (pass). Unsuccessful tests (fail) indicate defective board design, defective layout or defective chips. Data-vectors will be supplied by the designer of the circuit board (usually with the aid of a computer-aided-design (CAD) system). The data-vectors will be chosen so as to pinpoint problems on the board, if they exist.
The actual circuit board testing is performed with aid of a circuit board testing machine. (Circuit board testing machines are well known in the prior art. For example, a well known circuit board testing machine is the Hewlett-Packard Company model HP3065 circuit board tester. The HP3065, for instance, has 264 pins which can be simultaneously selectively connected to various pins of a given circuit board for application of data-vectors to the board and the monitoring of board output generated in response.) With the aid of a circuit board tester, whole sequences of data-vectors are applied to the board under test. Such sequences can be quite lengthy, requiring a large amount of memory to store both the data-vector sequences and the output generated by application of the data-vector sequences. In fact, it is not uncommon for data-vector listings to be thousands of data-vectors long where each data-vector is dozens of bits in length. (See, for example, FIG. 2 and accompanying text below). The amount of memory required to store such large amounts of data-vector information is expensive and unwieldy to manage in circuit board testing machines. Thus, manufacturers of circuit board test machines find useful methods for minimizing the amount of memory space necessary for storage and application of data-vector information.
Various data compression techniques are employed by circuit board tester manufacturers to minimize the volume of data-vector information which must actually be stored. One such technique for use with circuit board testers is described in U.S. Pat. No. 4,652,814, issued to Groves, et al. Groves discusses, among other things, a data compression technique involving elimination of redundant data-vectors, that is, retention of only the unique data-vectors in a given data-vector sequence together with sequencing information such that the position of each unique data-vector in the original sequence is "remembered".